1. Field of Invention
The present invention relates to a MOS-controlled thyristor and more particularly, to a three-terminal MOS-controlled thyristor with current saturation characteristics and without any parasitic thyristor structure.
2. Description of the Related Art
Power semiconductor structures that combine bipolar conducting mechanisms with a MOS control are well known. The insulated gate bipolar transistor (IGBT) is an example of such a device, in which the base current of a bipolar structure is controlled via an integrated MOSFET. The IGBT is best suited for high-voltage power electronic applications with blocking voltages in the range of 600 volts. IGBTs capable of handling higher voltages have a higher on-state voltage drop, which is disadvantageous. Since a lower on-state voltage drop is achievable by carrying the on-state current through a thyristor structure, MOS-gated thyristors have received considerable interest for high current, high voltage applications.
Two types of MOS-gated thyristors are the MOS-controlled thyristor (MCT) and the emitter-switched thyristor (EST). In the MCT, as described in an article by V.A.K. Temple, IEEE International Electron Device Meeting (IEDM) Technical Digest, San Francisco (December 1984), pp. 282-85, a cathode short circuit is switched via a MOS gate. However, the commercial development of the MCT has been limited because of complex fabrication requirements and current filamentation problems during turn-off, and because it does not have current saturation characteristics.
The EST, as shown in FIG. 1, basically consists of a MOSFET in series with a thyristor, and is said to be "emitter-switched." The EST lends itself to easier fabrication than the MCT. While the EST exhibits current saturation characteristics, it is, however, limited by an inherent parasitic thyristor, shown in FIG. 1, which bypasses the gate-controlled n-channel MOSFET. Accordingly, a need exists for an EST which has current saturation characteristics, but is not limited by a parasitic thyristor structure within the device.